OpenOFDM
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Contents:

  • Overview
  • Packet Detection
  • Frequency Offset Correction
  • Symbol Alignment
  • Sub-carrier Equalization and Pilot Correction
  • Decoding
  • SIGNAL and HT-SIG
  • Setting Registers
  • Verilog Hacks
  • Integration with USRP
OpenOFDM
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  • OpenOFDM: Synthesizable, Modular Verilog Implementation of 802.11 OFDM Decoder
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OpenOFDM: Synthesizable, Modular Verilog Implementation of 802.11 OFDM DecoderΒΆ

OpenOFDM is a open source Verilog implementation of 802.11 OFDM decoder. Highlights are:

  • Supports 802.11a/g (all bit rates) and 802.11n (20MHz BW, MCS 0 - 7)
  • Modular design, easy to extend
  • Fully synthesizable, tested on USRP N210

Contents:

  • Overview
    • Top Level Module
    • Project Structure
    • Sample File
  • Packet Detection
    • Power Trigger
    • Short Preamble Detection
  • Frequency Offset Correction
    • Coarse CFO Correction
    • Fine CFO Correction
  • Symbol Alignment
    • FFT
  • Sub-carrier Equalization and Pilot Correction
    • Sub-carrier Structure
    • Sub-Carrier Equalization
    • Residual Frequency Offset Correction
  • Decoding
    • Demodulation
    • Deinterleaving
    • Viterbi Decoding
    • Descrambling
  • SIGNAL and HT-SIG
    • Legacy SIGNAL
    • HT-SIG
  • Setting Registers
  • Verilog Hacks
    • Magnitude Estimation
    • Phase Estimation
    • Rotation
  • Integration with USRP
    • USRP N2x0 FPGA Overview
    • Enable Custom Modules
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© Copyright 2017, Jinghao Shi. Revision 0ab83ce2.

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